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Nvidia is delaying Blackwell by at least three months due to design flaws related packaging. Monday is going to be spicy to say the least.
Over half of my holdings are Nvidia shares, and I have no intention to sell. There are only two reasons in which I sell a stock:
The reason for my original investment changes.
Need money in real life.
Nvidia is technologically years ahead of the competition. Short term, its gona get really volatile and real ugly. Not selling my shares.
I have sold covered calls against the vast majority of my NVDA 0.00%↑ position though.
Looking forward to seeing these call options I wrote expire worthless. 🙃
So what is happening? To understand, you must have a basic grasp of how packaging works.
Blackwell needs CoWoS-L, as opposed to the CoWoS-S used by prior Nvidia GPUs.
So why is there a difference? Simplistically… bump pitch. AKA how far the little contact pads are away from each other.
CoWoS-S diagram with micro-bumps highlighted:
CoWoS-L with the challenging micro-bumps highlighted:
CoWoS-L has the following pros and cons:
Pros:
More density for additional signaling, say for a 10TB/s die-to-die interface.
Better power integrity, and thus power delivery, and thus power efficiency at a system level.
Cons:
Higher difficulty manufacturing, leading to lower yields.
Higher risk of thermal-induced degradation, causing micro-bumps to crack over time and thus cause reliability issues.
Smaller bumps are harder to line up.
Things expand as they get hot and contract when they cool down. Smaller bumps can handle less mechanical stress from thermal cycles.
You can see where problems might arise.
And so they have!
What does this mean for the future? Is the supposed 3-month delay plausible, or could it be worse?
To understand, you must understand how chips are made:
Chips have layers. Transistors at bottom. Each layer above gets larger/thicker. Eventually, the top of the chip is finished off an this is called the “bump out”.
In general, chips have many duplicate bumps for power, ground, and even signaling, even though in-silicon layers short these bumps.
For example, you could be feeding the same supply voltage into four neighboring bumps, even though the silicon itself shorts all four of these bumps in layer M15 or whatever.
Why do this? The answer is complicated electromagnetic technobabble.
Bad things happen if a lot of current is shoved through one tiny bump.
Bad things happen if a signal bump is not surrounded by ground bumps.
Nvidia claims the delay will be three months or more. My theory is they are going to re-spin the logic dies and change the bump-out. Some bumps can be removed, spaced out, fiddled with. A three-month delay tracks with a re-do of the top metal layers of the logic die to accommodate a new bump-out with better yield and reliability margins.
From an investment perspective, nothing has changed for me other than two actions I took last week:
Sold covered calls against the vast majority of my NVDA 0.00%↑ position.
Covered my AMD 0.00%↑ short, rotating into a QCOM 0.00%↑ short.
AMD is an attractive gambling opportunity now. I kinda want tp degen buy calls because this Blackwell delay will juice MI300/325X order volumes for the next few quarters.
In the most recent earnings call, AMD CEO Dr. Lisa Su claimed they had visibility into 2025 for their datacenter GPU business. At the time I thought this was either delusional nonsense or materially false statements. It seems like Su bae already knew about the Blackwell delay….
Love your analyses. There is some talk that NVIDIA denies this delay and The Information is publishing fake news. Any views?