Long MRDIMM, Short NAND Flash
Bonus: Samsung DS-Memory epic fail coverage.
Irrational Analysis is heavily invested in the semiconductor industry.
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Consider this an extended submission to the 2025 L/S fintwit contest.
I have a [small] long RMBS 0.00%↑, short WDC 0.00%↑ position right now. This is more out of intellectual interest than a desire to actually make money. Good learning opportunity. My track record with shorting is… not good.
Bonus: Samsung DS-Memory epic fail coverage, Galaxy S25 edition.
Contents:
Long MRDIMM
What are MRDIMMs?
Individual Component Deep-Dive
PMIC
Temperature Sensor
SPD Hub
MDB
MRDC
Rambus: A pure-play levered to MRDIMM
Short NAND Flash
What is NAND Flash?
Industry Vibe and Players
Target: Western Digital
History, charts, and a loose plan.
Bonus: Samsung Internal Violence
[1] Long MRDIMM
MRDIMM is a special type of memory supported by the latest Intel x86 CPU platform, Granit Rapids.
Volume ramp is happening soon. AMD’s next generation (whatever is after Turin) will support MRDIMM now that the tech is making it into official JEDEC spec.
There is one publicly traded company that is (surprisingly) and epic pure-play specifically for MRDIMM.
Rambus.
Follow me down the MRDIMM rabbit-hole.
[1.a] What are MRDIMMs?
MRDIMMs are special memory sticks that act as like two fake memory channels on the same stick.
Benefits:
Saves space on the motherboard.
~Doubles bandwidth assuming same base speed.
This is not true for current (1st) generation MRDIMM.
Regular DIMM runs at 6000-6400MT/s.
MRDIMM gen1 runs at 2x 4400MT/s = 8800MT/s effective.
MRDIMM gen2 will be at the full 12800MT/s effective speed.
More density per RAM stick.
[1.b] Individual Component Deep-Dive
Rambus had a press release less than three months ago:
There are five categories of component needed for an MRDIMM. Rambus makes them all.
[1.b.i] PMIC
Power-Managment ICs are not unique to MRDIMM.
What makes a MRDIMM PMIC special is that it needs to be very small (not much room on the RAM stick) and it needs to deliver power to MANY chips.
The usual tactic of “just add more phases and bypass caps” is not viable.
Designing such an unusually dense PMIC is challenging. It is also a niche market so the usual suspects either don’t have a solution or made a lazy (low-quality) solution.
(speculation on my part. to know for sure I would need to probe RAM sticks with a multimeter)
[1.b.ii] Temperature Sensor
Temperature sensors are typically built with diodes or thermistors. Designing an accurate temperature sensor is not difficult. I am not sure why Rambus investor materials highlight this so much.
[1.b.iii] SPD Hub
The Serial Presence Detect (SPD) hub is essentially a glorified I2C/I3C (basic debug IO) controller. This is easy to make. Boring.
[1.b.iv] MDB
Memory Data Buffer chips (MDB) are not storage devices. They are high-speed multiplexers.
Trapezoid = Mux = Multiplexor
These are very simple devices, only 7-9 transistors.
The tricky part is how fast these transistors need to switch.
MRDIMMs effectively operate at QDR. This means four data symbols per clock cycle.
Designing high-speed MUXes (~6GHz in this case) is non-trivial. Especially if there are power constraints.
It is likely that these MDB chips have buffer circuits or even a basic transimpedance amplifier to isolate impedance mis-match between the DDR chips on the module and the load (motherboard PCB + CPU package).
[1.b.v] MRCD
To understand the MRDC, we must first understand the vanilla registered clock driver (RCD).
The RCD chip routes commands (requests from the host CPU) to the appropriate row of memory chips. Thus, only half of the memory chips on the stick are active at any one time.
A MRDC chip is the same concept except both of the memory “ranks” are active. This leads to a speedup in addition to capacity benefits of a regular RCD chip.
Imagine you have two plates of food in front of you. You could use one hand to eat from every other plate sequentially, or you could use both hands (one assigned to each plate) to shovel food into your mouth at twice the speed.
Rambus has a great video that explains this.
At a high level, designing a MRDC chip has two primary challenges:
Unusually fast switching frequency requirements for the transistors.
Strict 1-cycle latency limit.
[1.c] Rambus: A pure-play levered to MRDIMM
There are a few companies that make the various (non-DRAM) chips needed for an MRDIMM. Renesas (very diversified company) has a few relevant products for example.
What makes Rambus so interesting to me is that it is a pure-play just for MRDIMM. Their recent decisions have been an attempt to financially engineer leverage to this factor.
A little over a year ago, Rambus sold their PHY IP assets to Cadence. This move was surprising to me at the time. Why sell PHY IP business but keep the controller IP?
Synopsys and Cadence both have controller IP they can bundle with PHY IP and EDA SaaS contracts/seats.
Rambus severely weakened their IP sales strength when they sold-off the PHY group.
It is clear that they want to hard pivot to MRDIMM silicon and have tacitly abandoned IP altogether.
Simple digital IP is easy to port across process nodes. Low capital intensity. This is in stark contrast with analog IP (PHY) that needs new tape-outs (silicon) for each process node.
Rambus can easily use emulation platforms to keep porting their digital IP and make minor speed improvements. It’s a low-effort, high ROI strategy that will likely decay revenue slowly as the two EDA majors win sockets from bundling and integration.
Let’s take a more high-level overview of Rambus.
We already discussed MRDIMM and what’s left of the IP business.
As the top comment on the Rambus YouTube video implied, Rambus has a history of patent trolling.
I am not going to bother making a nice Visio timeline of Rambus legal nonsense. They have a long track record and the business as it stands today will not grow.
Let’s look at the most recent 10-Q filing. You know things are getting obscure when I bother to bring up official SEC filings lol.
“Contract and other revenue” is the digital IP business Rambus has kept. The EDA majors will be leveraging PHY and SaaS contract bundling to win controller IP sockets from Rambus over time. For “security” IP, ARM will likely join the EDA majors in bundling and taking sockets from Rambus too. Rambus management appears to be aware of this and has made a conscious decision to YOLO into MRDIMM chips (product revenue).
Look at cost of revenue. The digital IP business is basically pure profit at 95% gross margin. Royalties (patent trolling) has zero cost of revenue as there is no line item.
So there is a super interesting situation now. The historical ultra-high gross margin businesses are either flat or decaying over time.
The product/MRDIMM chip business has 63% gross margins and is going to explode as Intel Granit Rapids ramps production and will explode again in ~12-18 months when Intel and AMD (and presumably ARM-based hyperscaler CPU chips) support next-gen 12800 MT/s MRDIMM.
This is a strange combination of businesses of an obscure small-cap company. Most financial analysts and professional investors probably don’t know what they are looking at here.
The tell is in how Rambus is presenting themselves in quarterly slide decks.
They wont shut up about this 42% CAGR number. It’s as if Rambus investor relations is trying to scream the play right at you.
[2] Short NAND Flash
For the short leg of the fintwit stupid ideas long/short contest, I have chosen NAND flash. It is still memory but the worst, most degenerate segment of memory.
[2.a] What is NAND Flash?
I have an old shitpost on this. To be clear, this thesis was intentionally bad and just a vector for me to use the “stressed Mira Murati” meme as a thumbnail.
Practically, you need to understand two concepts.
NAND Flash has many layers. (we are at 150-300 layers right now)
NAND Flash needs special equipment to print very deep high-aspect ratio holes.
I try to avoid writing about semicap because Fabricated Knowledge and Semianalysis are much better. No value for me to add here.
Regardless, NAND semicap is in a much better position than the NAND manufacturers. To understand why, lets take a quick tour.
[2.b] Industry Vibe and Players
All three of the DRAM players make NAND flash too. YMTC (PRC company) is in “others” and is rapidly growing.
Given the recent Micron earnings, someone is clearly dumping NAND right now.
[4QCY24] Marvell, Broadcom, Micron
![[4QCY24] Marvell, Broadcom, Micron](https://substackcdn.com/image/fetch/$s_!8QdX!,w_1300,h_650,c_fill,f_webp,q_auto:good,fl_progressive:steep,g_auto/https%3A%2F%2Fsubstack-post-media.s3.amazonaws.com%2Fpublic%2Fimages%2F82517275-096f-4ad5-aa96-671692ffc210_498x331.gif)
Irrational Analysis is heavily invested in the semiconductor industry.
I thought YMTC was the offender, but it might be Samsung. Frankly, it does not matter.
NAND is in a death spiral right now. Somebody is aggressively dumping into a cyclical downcycle driven by weak smartphone and PC markets.
You know the situation is bad because Enterprise (datacenter) SSD has also peaked… as datacenter capex keeps getting revised up.
There are two pure-play-ish (its complicated) NAND companies, Western Digital and Kioxia.
WDC 0.00%↑ has been desperately trying to merge with Kioxia for years. Due to a variety of reasons, this has not happened.
Instead, we are on the interesting timeline where Bain Capital (private equity bagholders) finally IPO-ed Kioxia. Simultaneously, Western digital is trying to split the NAND flash business from the (more stable and less masochistic) HDD business.
These two companies have a complicated relationship. So complicated that there is a dedicated slide deck for this shit.
This is financial engineering. I neither have the skillset nor motivation to parse this bullshit.
[2.c] Target: Western Digital
There are three reasons why I chose to short WDC 0.00%↑ over Kioxia.
My trading account (Webull) does not have access to Japanese equities.
I think enabling margin trading on Interactive Brokers significantly increases the probability I go bankrupt.
Western Digital had a hilarious investor presentation (“New Era of NAND”) that reeked of desperation and “loser energy”.
I have previously covered the WDC event. Here is an updated/abridged version with superior entertainment value.
June 10th, 2024: Western Digital declares the layers race is over and they don’t need to spend more money on CapEx.
December 4th, 2024: Semiengineering article on how innovators (not losers like Western Digital) are moving to 1,000 (~4-5x) layers within the next ~2 years.
[3] History, charts, and a loose plan.
My goal for this contest is to construct an interesting and thematic long/short strategy. Plan is to learn. Making money off this would be nice but honestly mostly interested in learning more about how markets work for this one.
Pure-Play Memory Investment Vectors:
Good (balanced risk/reward)
HBM Advanced Packaging: ONTO 0.00%↑ and CAMT 0.00%↑
Rambus via MRDIMM YOLO. (selected for long)
Dangerous (extreme risk/reward)
HBM manufacturers: MU 0.00%↑ and SK Hynix.
Neutral
Semicap majors with memory exposure such as LRCX 0.00%↑ and Tokyo Electron.
I try to avoid writing about semicap because Fabricated Knowledge and Semianalysis are much better. No value for me to add here.
Bad (short candidates)
Anyone with exposure to NAND flash lol.
Kioxia finally IPO after Bain Capital has been bagholding for years.
I choose WDC 0.00%↑ for my short leg.
Short-selling is illegal in South Korea.
Charts look good. Only problem is that Western Digital is spinning out their NAND flash division soon. Not sure what happens to my borrowed shares in that case. If I have to cover and re-short the new garbage then so be it. Whatever.
[4] Bonus: Samsung Internal Violence
Very surprised by this news TBH.
The source material from Korean-language news sites is hilarious.
(obviously I used Google translate)
https://dealsite.co.kr/articles/134327
https://mbiz.heraldcorp.com/article/10381688?ref=naver
This is hilarious.
Obviously, Samsung DS-Memory knew that there was a risk of DX/MX moving volume to Micron. What is incredible is that they played a game of chicken and lost.
I think this news in a strong indicator that Samsung Electronics is finally at a breaking point.
DX/MX cannot use overpriced DS LPDDRx because Qualcomm is raising application processor prices so much they would have negative operating margins on the Galaxy Smartphones.
DS-Memory cannot lower LPDDR5X prices further because the product quality is terrible, and they are hemorrhaging DRAM share to CXMT.
DS-LSI (Exynos) cannot deliver a product to balance Qualcomm’s price hikes because DS-Logic-Foundry has catastrophically failed multiple years in a row.
Check out this piece by Jukanlosreve for more info on the drama.
https://www.sammobile.com/opinion/dont-blame-tm-roh-hes-the-guardian-of-samsungs-galaxy/
Thank you for the great article. Why just Rambus? this business small to Renesas so understandable. But Montage totally out?
Great article as usual.