Forget N3. AMD can make hay with N5. As memory prices have risen, client demand drops. AMD can repurpose high end desktop Ryzen 9/Threadripper N5 CCD CPU chiplets towards Genoa. Same N6 IO die. The CCD economics should be even better there.
Intel 3 is at best similar to N5 and if Intel is selling more Granite Rapids on Intel 3 then AMD can absolutely undercut it on price with Genoa/Bergamo even if the perf/W is the same -
Client, gaming, and embedded can all be sacrificed at varying degrees to divert towards Agentic AI cpu demand. Chiplets are incredibly fungible :)
Head node CPUs from AMD are pretty underrated for the GPU story. They are years ahead of everyone else and from the conference call, "began to design CPUs tailored for AI workloads well ahead of competitors" (paraphrased). From Semianalysis, MI450 series looks outright superior from TCO standpoint
Of course, advertised FLOPs vs real ones aren't quite the same, but at least from my research it's a very close battle. I could see AMD bundling CPUs and GPUs for very frothy premiums, as they already did with the Meta deal through Venice CPUs
Also noteworthy is FPGAs, which don't get anywhere as much attention as they should. For context, AMD bought Xilinx through acquisition in 2022
1) Human robotics REALLY needs them for latency sensitive edge inference
2) Next gen accelerator racks have 120+ FPGAs, according to an interesting interview I saw recently with Dylan Patel. May be for network packet sync, but to be honest I'm not super technically proficient here so corrections appreciated. I'd recommend watching the whole interview (it's < 1 hour), but I'll just include the timestamp for FPGA to complete the point:
So... This is obviously extremely positive for AMD: You're looking at a company with leading edge GPUs, CPUs, and FPGAs - and in the last two categories, clear frontrunners at that
Also, as an AMD shareholder you get one of the goat CEOs in Lisa Su. I sleep very well at night knowing most of portfolio is in her hands, this footnote at the end could be a 10 page essay in itself through AMD's history :D
P.S. Feel free to fact check what I've written here, I'm just a 19 year old engineering newbie in college ¯\_(ツ)_/¯
venice is amd's first cpu engineered from the ground up to be the best and I think they'll handily beat the promised +70MT% gen over gen target.
- N4P -> N2P
- 2 new IODs with 16 instead of 8 channels, and new fabric almost certainly an improved version of the one shipped with Styx halo,
- 33% more cores
- Zen6
- 600W instead of 500W (but the cores should run significantly faster than in Turin despite the specific power budget per core likely falling just because of the numerics)
think of Jensen's even for free is not good enough when u think of competing server SKUs. that'd be my guess for what amd's goal with venice is and it'll cost a fortune if I had to guess. OpenAI and Meta will look really smart for their deals with AMD...
oh and AMD's CTO was interviewed by Ian Cutress where he disclosed that AMD's target from now on is working a0 cpu silicon on the first try, which they accomplished with zen6 for the fist time https://youtu.be/yUBzu7oTTDo?si=b0Tib7YWLHAKMkSb&t=1097. Seems like a crazy detail with far reaching consequences...
Two more on the InP supply chain, beyond yield and brittleness: wafers are still small (4in norm, 6in barely starting), and the substrate suppliers are few — Sumitomo Electric, AXT, JX Advanced Metals. Both reinforce your Tx call: InP is too scarce to spend where SiPho works. Reserve it for the spots where nothing else can.
BTW AMD can and does get a ton of pre-N3 node allocation for their previous-gen DC CPUs, which are still competitive with Intel/Arm. And they're one of the first to N2 node with Venice. So they will sell a lot, even if they don't get as much N3 node
Excellent article and analysis. Reuters repeatedly emphasized qualification cycles as the reason customers can't simply switch suppliers. In your view, is the real scarcity here InP material itself, or qualified manufacturing capacity?
The latter feels potentially much harder to solve.
Forget N3. AMD can make hay with N5. As memory prices have risen, client demand drops. AMD can repurpose high end desktop Ryzen 9/Threadripper N5 CCD CPU chiplets towards Genoa. Same N6 IO die. The CCD economics should be even better there.
Intel 3 is at best similar to N5 and if Intel is selling more Granite Rapids on Intel 3 then AMD can absolutely undercut it on price with Genoa/Bergamo even if the perf/W is the same -
https://www.phoronix.com/review/intel-xeon-6980p-power/7
Client, gaming, and embedded can all be sacrificed at varying degrees to divert towards Agentic AI cpu demand. Chiplets are incredibly fungible :)
Head node CPUs from AMD are pretty underrated for the GPU story. They are years ahead of everyone else and from the conference call, "began to design CPUs tailored for AI workloads well ahead of competitors" (paraphrased). From Semianalysis, MI450 series looks outright superior from TCO standpoint
https://x.com/canyoudugit8/status/2062338956738654298?s=20
Of course, advertised FLOPs vs real ones aren't quite the same, but at least from my research it's a very close battle. I could see AMD bundling CPUs and GPUs for very frothy premiums, as they already did with the Meta deal through Venice CPUs
Also noteworthy is FPGAs, which don't get anywhere as much attention as they should. For context, AMD bought Xilinx through acquisition in 2022
1) Human robotics REALLY needs them for latency sensitive edge inference
2) Next gen accelerator racks have 120+ FPGAs, according to an interesting interview I saw recently with Dylan Patel. May be for network packet sync, but to be honest I'm not super technically proficient here so corrections appreciated. I'd recommend watching the whole interview (it's < 1 hour), but I'll just include the timestamp for FPGA to complete the point:
https://youtu.be/LF3aUIM57uw?si=2ALWNe9Hmjz4dzH_&t=2240
So... This is obviously extremely positive for AMD: You're looking at a company with leading edge GPUs, CPUs, and FPGAs - and in the last two categories, clear frontrunners at that
Also, as an AMD shareholder you get one of the goat CEOs in Lisa Su. I sleep very well at night knowing most of portfolio is in her hands, this footnote at the end could be a 10 page essay in itself through AMD's history :D
P.S. Feel free to fact check what I've written here, I'm just a 19 year old engineering newbie in college ¯\_(ツ)_/¯
Great analysis, thank you! Any reason why you don't hold Marvell?
great note as always, but w.r.t. amd, amd has just come out with a blogpost on how good venice will be compared to intel and nvidia, except the numbers are almost certainly heavily sandbagged here https://www.amd.com/en/blogs/2026/agentic-ai-needs-rack-scale-cpu-performance-amd-epyc.html
venice is amd's first cpu engineered from the ground up to be the best and I think they'll handily beat the promised +70MT% gen over gen target.
- N4P -> N2P
- 2 new IODs with 16 instead of 8 channels, and new fabric almost certainly an improved version of the one shipped with Styx halo,
- 33% more cores
- Zen6
- 600W instead of 500W (but the cores should run significantly faster than in Turin despite the specific power budget per core likely falling just because of the numerics)
think of Jensen's even for free is not good enough when u think of competing server SKUs. that'd be my guess for what amd's goal with venice is and it'll cost a fortune if I had to guess. OpenAI and Meta will look really smart for their deals with AMD...
oh and AMD's CTO was interviewed by Ian Cutress where he disclosed that AMD's target from now on is working a0 cpu silicon on the first try, which they accomplished with zen6 for the fist time https://youtu.be/yUBzu7oTTDo?si=b0Tib7YWLHAKMkSb&t=1097. Seems like a crazy detail with far reaching consequences...
Two more on the InP supply chain, beyond yield and brittleness: wafers are still small (4in norm, 6in barely starting), and the substrate suppliers are few — Sumitomo Electric, AXT, JX Advanced Metals. Both reinforce your Tx call: InP is too scarce to spend where SiPho works. Reserve it for the spots where nothing else can.
BTW AMD can and does get a ton of pre-N3 node allocation for their previous-gen DC CPUs, which are still competitive with Intel/Arm. And they're one of the first to N2 node with Venice. So they will sell a lot, even if they don't get as much N3 node
your articles are great. Thanks!
If you believe Marvell will be the primary beneficiary, why haven't you taken a position? Is it because SMTC has a greater torque?
Excellent article and analysis. Reuters repeatedly emphasized qualification cycles as the reason customers can't simply switch suppliers. In your view, is the real scarcity here InP material itself, or qualified manufacturing capacity?
The latter feels potentially much harder to solve.
Already owned both MRVL & SMTC lol, keep fking Murphy, keep buying in lol
Bro Macom invested in IQE, what could be the implication? IQE looks like the degen Wolfspeed in the InP space
So I shouldn't full port smtc
Just buy in for SMTC’s CTLE big win in MTK’s TPU V9
Been buying since $80s 🚀
You missed MaxLinear’s DSP PAM4 which could win marketshare. For investing theres larger upside there than marvell.
Only 6% market shares